HYPERBUS™ Memory Controller IP Package

HYPERBUS™ Memory Controller IP Package

The IP Package is a collection of RTL (Register-transfer level) source code and documentation intended to help designers add support for HYPERBUS™ to their FPGA (Field-Programmable Gate Array), ASIC (Application-Specific Integrated Circuit), or ASSP (Application-Specific Standard Product) host controller platform. The Controller IP supports both HYPERFLASH™ and HYPERRAM™ products. The Controller IP Package comes at a price of USD 2,750. It can be requested on the Infineon Developer Center by following this link: https://softwaretools.infineon.com/software?q=hyperbus

The HYPERBUS™ Master Interface Controller IP Package includes the following software and materials:

  • HYPERBUS™ Controller Verilog HDL RTL Source Code
  • HYPERBUS™ Controller IP Specification Introduction to future steering concept for automated trucks
  • System Verilog Test Bench (AXI4 and AXI3)
  • Verilog Memory Behavioral Model (HYPERFLASH™ and HYPERRAM™)
  • Test Specification
  • Test (Verification Report)
  • Test Script
  • Application Note for AMBA AXI